LDPC codes are a class of error correction codes invented in 1960 by Robert Gallager of MIT (“Massachusetts Institute of Technology”), constituting an alternative to the Viterbi codes as well as to the more recent turbo codes. LDPC codes are block codes which allow approaching the Shannon Limit. The first commercial standard stipulating the use of an LDPC code is the DVB-S2 standard, which is the second-generation ETSI (“European Telecommunication Standardization Institute”) standard for satellite digital video broadcasting. LDPC coding is included in it for channel coding, to protect the sent data from noise affecting the transmission channel.
With reference to FIG. 1, a generic transmission subsystem contains, on the side of the sender 10, a data source 11 (denoted DAT_SRC in the figure), followed by a source encoder 12 (denoted SCR_ENC in the figure), a channel encoder 13 (denoted CH_ENC in the figure), and a modulator 14 (denoted MOD in the figure). The source encoder 12 compresses the data (for example using a standard such as MPEG, H264, etc.) so as to reduce the bit rate of the data to be transmitted. The channel encoder adds redundancy (for example by using an LDPC code) to enable the receiver 30 to correct potential errors due to the noise introduced into the transmission channel 20. The modulator 14 adapts the signal to the transmission channel (for example, satellite transmission channel, radio transmission channel, etc.). On the receiver side 30, a demodulator 34 (denoted DEMOD in the figure), followed by a channel decoder 33 (denoted CH_DEC in the figure), and a source decoder 32 (denoted SRC_DEC in the figure), perform operations dual to those performed by the modulator 14, the encoder 13, and the encoder 12, respectively. The demodulated and decoded data are then restored to the entity that uses the data 31 (denoted DAT_U in the figure).
When the channel coding uses a block coding algorithm, as is the case for LDPC codes, the channel decoder comprises an input memory, or channel memory, for storing the data to be decoded. In the known decoders, this memory may comprise a first single port storage element configured for storing a block of bits corresponding to a previously received code word which is currently being decoded, and a second single port storage element configured for storing another block of bits corresponding to a code word currently being received. The processes of receiving and decoding may thus be simultaneous. To avoid the input memory of the decoder becoming full, the block decoding time must be less than the block receiving time. In order to have the highest possible bit rate, the block receiving time must be as low as possible. Therefore, as a general rule, the block decoding time is close to the block receiving time while being less than this receiving time.